1. Technical Field
This disclosure relates to communication links and error detection and handling.
2. Description of the Related Art
Systems that employ communication links with SerDes-based interconnects typically require circuitry not only to serialize and deserialize the data between serial and parallel data formats, but also to ensure accurate transmission across lossy channels. More particularly, in lossy channels, there is a finite probability of data bit loss due to, for example, inter symbol interference, clock jitter, power supply noise, and the like.
In such systems, it may be the data link layer that is responsible for ensuring reliable transport of frame data. However, in many conventional systems, some of the functionality associated with the reliability can incur a great deal of implementation overhead. In some systems this implementation overhead may be necessary due to addressing of multiple endpoints over multiple switches, dropped packets from over-subscribed switches, common mode noise, etc. Accordingly, although necessary in such systems, the implementation overhead may reduce bandwidth efficiency of the link, particularly when transferring smaller data payloads. Thus, to maintain efficiency in the bandwidth utilization of conventional systems, the implementation overhead may be amortized by sending larger data payloads. However, the loss of efficiency and the additional cost of the implementation overhead may be unacceptable for systems that primarily transfer smaller data payloads.